基于DSP的雷达信号采集处理系统

基于数字信号处理器（DSP）能实时完成信号处理的特点,提出了采用AD公司生产的定点DSP芯片ADSP2181来设计雷达信号采集处理系统的一种方案。这种方案比传统意义上应用微处理器（MPU）实现信号采集处理有更快的处理速度,更方便的接口设计和更高的精度。作为高频地波雷达的一部分,该雷达信号采集处理系统能够满足高频地波雷达要求采样速度快、信号实时处理的要求,可正确地对海洋回波信号进行实时采集和高速处理。     

基于数字信号处理器的语音无线混沌通信——系统设计与硬件实现

提出了一种基于数字信号处理器(DSP)的语音无线混沌数字通信系统设计与硬件实现的新方案.根据Runge-Kutta算法和变量比例扩张变换,以多涡卷广义Jerk系统为例,对其连续混沌系统作离散化处理,产生作为语音数据加密与解密的混沌数字序列.在芯片型号TMS320VC5509APGE的DSP技术平台上,利用无线发送器和无线接收器nRF2401,实现了语音无线混沌数字通信.给出了技术设计与硬件实现结果,证实了该方案的可行性.     

基于Nios的微距控制系统的数字设计

设计了一种基于Nios处理器的微距控制系统,用于实现虚拟成像设备系统视标位置的精确定位。系统采用现场可编程门阵列(FPGA)实现对步进电机PWM的细分驱动和对光栅尺输出信号的鉴相倍频,构建了基于Nios的微距控制系统的数字设计部分。采用Altera公司的FPGA设计工具Quartus II和嵌入式开发套件 Nios IDE,将可配置的软核处理器与可编程的硬件电路集于一体,既实现了软件处理的灵活性,又具有硬件处理的高速性特点。实验表明,该设计在虚拟成像设备的标视定位中取得了良好的效果,实现了精度为1.25 μm的微距控制。     

数字信号处理器红外弱小目标搜索算法

提出了一种基于数字信号处理器（DSP）的红外弱小目标搜索高速实时算法。算法主要针对天空中不规则云团在预处理过程中残留的边缘而设计,是在背景预测算法基础上改进的一种基于陷波滤波器的搜索算法。在DSP实时处理平台上实现并经实际场景试验验证,该算法能有效削弱残留边缘的影响,使最远探测距离指标上升至前向迎头26 km,实时处理速度达到75 Hz,满足系统要求。采用信噪比增益指标对算法进行了评价,结果显示,该算法能够显著提高图像信噪比,利于检测出目标。     

低密度奇偶校验码的性能分析与水下通信验证

在ADSP-BF561上实现了低密度奇偶校验码的编码算法。为解决编码复杂度高的问题,将校验矩阵变换后存入数据空间。为节省存储空间,采用压缩算法,并提出相应的编码算法,没有增加复杂度。对不同码率的低密度奇偶校验码在不同信道中的性能进行仿真分析。将不同码率的低密度奇偶校验码应用于水声通信系统进行浅海试验,结果表明低密度奇偶校验码能提高通信系统的鲁棒性,码率越低性能越好。当解码前符号信噪比在7～8dB时,可达到近似无误码的通信性能。     

Acceleration of the Smith–Waterman algorithm using single and multiple graphics processors

Finding regions of similarity between two very long data streams is a computationally intensive problem referred to as sequence alignment. Alignment algorithms must allow for imperfect sequence matching with different starting locations and some gaps and errors between the two data sequences. Perhaps the most well known application of sequence matching is the testing of DNA or protein sequences against genome databases. The Smith–Waterman algorithm is a method for precisely characterizing how well two sequences can be aligned and for determining the optimal alignment of those two sequences. Like many applications in computational science, the Smith–Waterman algorithm is constrained by the memory access speed and can be accelerated significantly by using graphics processors (GPUs) as the compute engine. In this work we show that effective use of the GPU requires a novel reformulation of the Smith–Waterman algorithm. The performance of this new version of the algorithm is demonstrated using the SSCA#1 (Bioinformatics) benchmark running on one GPU and on up to four GPUs executing in parallel. The results indicate that for large problems a single GPU is up to 45 times faster than a CPU for this application, and the parallel implementation shows linear speed up on up to 4 GPUs.     

The customer response times in the processor sharing queue are associated

The customer response times in the egalitarian processor sharing queue are shown to be associated random variables under renewal inputs and general independent service times assumptions.The work by this author was supported in part by the National Science Foundation under grant ASC 88-8802764 and by the Office of Naval Research under grant ONR N00014-87-K-0796.     

75帧/s准高帧频CCD摄像机74H0的特性分析

介绍了准高帧频CCD摄像机的一般概念及 75帧 /sCCD摄像机输出图像的工作原理和主要性能指标。准高帧频CCD摄像机具有 75帧 /s的图像速度 ,除了适合于弱视阅读机以外 ,还能在电视电影拍摄和相互转换应用中起到积极作用 ;另外还能在电视监控准动态运动物体和交通监控系统中作为前端传感器。由于能与PC显示器匹配 ,所以可应用到各学科研究领域的图像分析仪中     

汽车尾气催化处理器的中毒状况分析

使用北京正负电子对撞机国家实验室(BEPC)同步辐射装置,将光束限制在20×20μm~3的范围内,进行X射线荧光分析研究使用过的汽车尾气催化处理器中活性元素Co,Pt,La,Sr及侵袭元素Pb,Zn(即中毒元素)的分布状况。实验结果表明,中毒元素分布在处理器的表面大约30μm的范围内,基本上没有进入体内,而活性元素分布在体内。中毒元素含量沿排气方向递减。     

A Monte Carlo algorithm for real time task scheduling on multi-core processors with software controlled dynamic voltage scaling

The task scheduling problem for multi-core processors is an important algorithm design issue. Dynamic voltage scaling (DVS) is used to reduce the energy consumption of cores. We ponder the problem of task scheduling on a multi-core processor with software controlled DVS where the objective is to reduce the energy consumption. We consider a system with a single multi-core processor with software controlled DVS having a finite set of core speeds and discuss a task scheduling problem associated with it. The problem that we address is to find a minimum energy task schedule for a given set of independent tasks that have to be completed within a given common deadline. We propose a Monte Carlo algorithm of complexity $O(t(\mathit{mp}+q+\mathit{log}(t))+p(t+q)(D^{\mathit{pq}}+n))$ for solving the task scheduling problem and compare it with the optimal algorithm. Here t is the number of tasks, p is the number of cores, q is the number of core speeds, m is an integer parameter that is the number of iterations we should try to get a feasible solution before declaring that no solution is possible, n is an integer parameter that is the number of iterations we should try to reduce the energy consumption when we get a feasible solution, and D is the common deadline of the tasks.